The invention relates generally to electronic memory, and more specifically to improving throughput in reading flash memory.
A variety of computer systems and electronic devices use memory that is not volatile, or does not lose its content when power is disconnected. These nonvolatile memories can be reprogrammed, read, and erased electronically, and are particularly well suited to storing information such as music in digital audio players, pictures in digital cameras, and configuration data in cellular telephones. Such memory is commonly known as flash memory, named in part because a flash operation is used to erase the content of a block of data before it is reprogrammed, and is packaged for consumer use in products such as CompactFlash memory cards, USB flash memory drives, and other such devices.
Flash memory comprises a number of cells, each of which typically stores a single binary digit or bit of information. A typical flash memory or nonvolatile memory cell comprises a field effect transistor having an electrically isolated floating gate that controls electrical conduction between source and drain regions of the memory cell. Data is represented by a charge stored on the floating gate, and the resulting conductivity observed between the source and drain regions.
The floating gate separates a second gate from the source and drain regions of the memory cell, which is called the control gate. Electrons stored on the floating gate insulated from the control gate and the drain and source by an insulating oxide layer partially cancel out or modify an electric field produced by the control gate, resulting in a change in the effective threshold voltage (Vt) of the memory cell. When the memory cell is read by placing a specified voltage on the control gate, the electrical impedance between the source and drain of the device will either allow or not allow current to flow, depending on the presence of a charge on the floating gate and the effective Vt or threshold voltage of the memory cell. The presence or absence of current above a threshold level is sensed, and used to determine the state of the memory cell, resulting in a one or zero value being read.
Memory cells are typically arranged in a two-dimensional array of rows and columns, where the rows are coupled via a wordline conductor and the columns are coupled via a bitline conductor. The wordline and bitline conductors are used during data read and write functions to either select certain wordlines for reading or to select words and bits for writing. Reads and writes are coordinated by memory controllers, which bring the flash memory cells into the proper state to be read or written, and which buffer the read or written value while it is being written or transferred out of memory.
The speed at which the write process works is limited in part by the memory control structure of the memory device, and in part by the amount of time needed to program a memory cell using the electron tunneling process. The read speed is limited largely by the time needed to load the read address into the memory controller, select and access a memory word, and load and buffer the read word so that it can be transferred out of the memory device into a processor, bus, or other electronic component. To provide faster availability of data to these other devices, to provide faster operation of electronic devices incorporating flash memory, and for other reasons, it is desired to transfer data from the flash memory quickly.